# Tech Lead, Digital Design Engineer at Astera Labs

- Company: Astera Labs
- What the company does: Astera Labs: Purpose-Built Connectivity for Rack-Scale AI.
- Company website: https://www.asteralabs.com
- Type: Startups
- Level: Senior
- Location: San Jose, California, United States
- Work setup: On-site
- Pay: $176K to $195K base salary per year (USD)
- Posted: 2026-09-30
- Apply by: 2026-11-14
- Apply: https://job-boards.greenhouse.io/asteralabs/jobs/4738463005?utm_source=1752vc&utm_medium=careers
- Page: https://www.1752.vc/careers/jobs/astera-labs-tech-lead-digital-design-engineer-2/

## About the role

Astera Labs is seeking a Tech Lead Engineer to drive front-end digital design for high-performance switch ASICs that enable rack-scale AI infrastructure. In CCE2, you will translate microarchitecture into robust RTL and lead block-level execution across synthesis, timing, verification, DFT, and physical implementation. Found on 1752vc Careers, the job board for startup and VC roles.

## What they're looking for

- Bachelor’s degree in Electrical Engineering or a related field
- 5–8 years of experience developing or supporting complex SoC or silicon products for switch ASIC, networking, server, or storage applications
- Hands-on experience with high-speed protocols, including UALink, UCI, PCIe Gen 6/7, ESUN, and Ethernet
- Proven front-end digital design experience spanning architecture, RTL, simulation, synthesis, timing closure, gate-level simulation, and DFT
- Experience owning blocks from architecture through GDS and working with Synopsys and/or Cadence design tools and flows
- Authorized to work in the United States

Tags: ASIC Engineering

Source: 1752vc Careers, https://www.1752.vc/careers/jobs/astera-labs-tech-lead-digital-design-engineer-2/