# CMOS SerDes or High-Speed I/O, Lead Analog IC Design Engineer at Cadence

- Company: Cadence
- What the company does: Cadence delivers remote patient monitoring and chronic disease management that improves outcomes and reduces cost at scale. Intelligent senior care that works better by working ahead. Backed by General Catalyst.
- Company website: https://www.cadence.care/
- Type: Startups
- Level: Senior
- Location: SAN JOSE
- Work setup: On-site
- Pay: $119K to $221K base salary per year (USD)
- Posted: 2026-10-22
- Apply by: 2026-12-06
- Apply: https://cadence.wd1.myworkdayjobs.com/en-US/External_Careers/job/SAN-JOSE/Lead-Analog-IC-Design-Engineer_R56535?utm_source=1752vc&utm_medium=careers
- Page: https://www.1752.vc/careers/jobs/cadence-lead-analog-ic-design-engineer/

## About the role

The Lead Analog IC Design Engineer is responsible for designing and developing analog and mixed-signal circuits- from initial concept and specification through final verification- to ensure conformance with customer requirements. Found on 1752vc Careers, the job board for startup and VC roles.

## What they're looking for

- At least three years of experience designing and developing CMOS SerDes or high-speed I/O integrated circuits
- Design experience with most of the following SerDes circuit blocks: Transmitters and receivers, serializers and deserializers, phase interpolators, low-jitter PLLs, high-speed clock-distribution circuits, bias circuits, and voltage regulators
- Good understanding of jitter and signal-equalization techniques
- Proficiency with CAD tools for circuit simulation, layout, and physical verification
- Master’s degree or Ph.D. in electrical engineering
- Strong problem-solving skills and analog design aptitude


Source: 1752vc Careers, https://www.1752.vc/careers/jobs/cadence-lead-analog-ic-design-engineer/