# Lead Verification Engineer at Cadence

- Company: Cadence
- What the company does: Cadence delivers remote patient monitoring and chronic disease management that improves outcomes and reduces cost at scale. Intelligent senior care that works better by working ahead. Backed by General Catalyst.
- Company website: https://www.cadence.care/
- Type: Startups
- Level: Senior
- Location: 2 Locations
- Work setup: On-site
- Posted: 2026-09-23
- Apply by: 2026-11-07
- Apply: https://cadence.wd1.myworkdayjobs.com/en-US/External_Careers/job/NOIDA/Lead-Verification-Engineer_R56198-1
- Page: https://www.1752.vc/careers/jobs/cadence-lead-verification-engineer/

## About the role

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.

## What they're looking for

- The person should be an Electrical, Electronics or Computer Science Engineer with very good understanding of HDLs (Verilog and/ or VHDL)
- Prior experience in Emulation/UPF will be big plus. He/ she should have a good working knowledge of EDA tools (Cadence/ Others) specially Palladium with focus towards debugging design/ verification problems
- Experience in process automation with scripting
- Experience with SystemVerilog, C++, UVM
- Experience with Functional Verification of complex digital systems, e.g. SoC Verification, with a Hardware Verification Language (HVL) like SystemVerilog
- B. Tech/BE/ M. Tech / ME with 3+ years of relevant experience