# ASIC Power Design Engineer II (Full Time) - United States at Cisco

- Company: Cisco
- What the company does: Cisco is a worldwide technology leader powering an inclusive future for all. Learn more about our products, services, solutions, and innovations. Backed by Sequoia and Menlo.
- Company website: https://www.cisco.com/
- Type: Startups
- Level: Mid level
- Location: San Jose, California, US
- Work setup: On-site
- Posted: 2026-11-03
- Apply by: 2026-12-18
- Apply: https://cisco.wd5.myworkdayjobs.com/en-US/Cisco_Careers/job/San-Jose-California-US/ASIC-Power-Design-Engineer-II--Full-Time----United-States_2030409?utm_source=1752vc&utm_medium=careers
- Page: https://www.1752.vc/careers/jobs/cisco-asic-power-design-engineer-ii-full-time-united-states/

## About the role

Please note this posting is to advertise potential job opportunities. This exact role may not be open today but could open in the near future. When you apply, a Cisco representative may contact you directly if a relevant position opens. Found on 1752vc Careers, the job board for startup and VC roles.

## What they're looking for

- Implement and optimize low-power design methodologies (clock gating, power gating, multi-Vt, dynamic voltage and frequency scaling, and UPF/CPF power intent)
- Perform block- and full-chip-level power analysis and estimation using Synopsys PrimePower (PTPX) across various operating modes, PVT corners, and functional activity scenarios (VCD/FSDB/SAIF)
- Collaborate closely with RTL design, architecture teams to identify power bottlenecks and guide RTL/micro-architectural power optimizations
- Achieve timing closure, signal integrity, and power targets across advanced process nodes (FinFET / GAA)
- Develop and maintain automated design and analysis workflows using Python, TCL, and Perl
- Participate in post-silicon power and performance validation and correlation against pre-silicon PrimePower models


Source: 1752vc Careers, https://www.1752.vc/careers/jobs/cisco-asic-power-design-engineer-ii-full-time-united-states/