# Staff Analog Design Engineer, SerDes Clocking at d-Matrix

- Company: d-Matrix
- What the company does: d-Matrix is redefining AI inference with memory-centric compute built for ultra-low latency, greater efficiency, and scalable AI infrastructure.
- Company website: https://www.d-matrix.ai
- Type: Startups (AI role)
- Level: Senior
- Location: Santa Clara
- Work setup: Remote
- Pay: $155K to $250K base salary per year (USD)
- Posted: 2026-08-19
- Apply by: 2026-10-08
- Apply: https://jobs.ashbyhq.com/d-Matrix/922e130d-e3b1-4923-afc9-b13d60c5c093
- Page: https://www.1752.vc/careers/jobs/d-matrix-staff-analog-design-engineer-serdes-clocking/

## About the role

This is a hands-on, transistor-level analog design role owning the clocking subsystem of d-Matrix's high-speed SerDes on our IO chiplet — including the PLL, DLL, phase interpolator, high-frequency clock distribution, and clock and data recovery (CDR) loop. This block set most often determines whether a link closes, and you will personally carry your designs from specification through silicon characterization.

Tags: Hardware Engineering