# RTL Engineer at Density

- Company: Density
- What the company does: Density shows you how people use your space and helps you get more out of every square foot. Backed by Kleiner Perkins and South Park Commons.
- Company website: https://www.density.io/
- Type: Startups (AI role)
- Level: Mid level
- Location: Mountain View, CA
- Work setup: On-site
- Posted: 2026-07-01
- Apply by: 2026-10-08
- Apply: https://job-boards.greenhouse.io/densityai/jobs/4303711009
- Page: https://www.1752.vc/careers/jobs/density-rtl-engineer/

## About the role

Design the RTL that defines our AI accelerator. You'll architect and implement the digital blocks — compute datapath, memory subsystem, on-chip interconnect, and control logic — from microarchitecture spec through synthesis-ready, timing-clean RTL, and own those blocks end-to-end with architecture, DV, physical design, and DFT all the way to silicon.

## What they're looking for

- Strong digital-design fundamentals and expert Verilog/SystemVerilog RTL
- 5+ years designing complex digital blocks/SoCs taken to silicon
- Solid microarchitecture skills — pipelining, datapath/control, FIFOs, arbitration, memory subsystems, on-chip interconnect/NoC
- Synthesis & timing awareness — writing synthesizable RTL, SDC constraints, STA, clock/power gating, CDC, lint
- Demonstrated collaboration with DV, PD, and DFT across the full RTL2GDS flow to tapeout
- Scripting (Python/Tcl/) for design automation

Tags: Hardware