# Signal Integrity & Power Integrity Engineer at Density

- Company: Density
- What the company does: Density shows you how people use your space and helps you get more out of every square foot. Backed by Kleiner Perkins and South Park Commons.
- Company website: https://www.density.io/
- Type: Startups (AI role)
- Level: Mid level
- Location: Mountain View, CA
- Work setup: On-site
- Posted: 2026-07-02
- Apply by: 2026-10-08
- Apply: https://job-boards.greenhouse.io/densityai/jobs/4304937009
- Page: https://www.1752.vc/careers/jobs/density-signal-integrity-and-power-integrity-engineer/

## About the role

Own the signal-integrity and power-integrity engineering that keeps our AI accelerator running clean — across die, package, and board. You'll model and sign off the high-speed interface channels and power-delivery networks that move data and power through the system, set the SI/PI budgets the design is built to, and partner closely with the package, PCB, physical-design, and architecture teams to meet them.

## What they're looking for

- Exceptional abilities across SI/PI analysis: link budgeting, channel modeling and S-parameter extraction, IBIS-AMI, IR-drop and power-delivery-network (PDN) analysis, and EM/thermal-aware signoff
- 5+ years of SI/PI experience on very high-performance designs at advanced technology nodes (7nm or better) and high-speed interfaces (PCIe, DDR/LPDDR, HBM, 112G+ SerDes, or equivalent)
- Hands-on with industry-standard tools (Ansys HFSS / SIwave / RedHawk, Cadence Sigrity / Clarity, Synopsys, Keysight ADS or equivalent) for extraction, EM, and PDN analysis
- Demonstrated ability to work closely with package, PCB, physical design, and architecture teams to set and sign off SI/PI budgets across die–package–board
- (Optional) 2.5D / 3D and multi-die packaging (CoWoS, EMIB, chiplets, HBM interfaces), jitter / equalization design, co-packaged optics, or post-silicon SI/PI correlation and lab validation

Tags: Hardware