# RTL Intern at Etched

- Company: Etched
- What the company does: Co-designed chips, racks, and software to push the pareto frontier to best-in-class throughput and interactivity. Backed by Kleiner Perkins and Sequoia.
- Company website: https://www.etched.com/
- Type: Startups
- Level: Internship
- Location: San Jose
- Work setup: On-site
- Posted: 2026-09-18
- Apply by: 2026-11-02
- Apply: https://jobs.ashbyhq.com/etched/157ed4f4-6e3b-4ec9-b93f-3e363e92041e
- Page: https://www.1752.vc/careers/jobs/etched-rtl-intern/

## About the role

As an RTL Intern at Etched, you will help design microarchitecture and implement logic in verilog. You will work with cutting-edge machine learning architectures, contribute to RTL block development, and participate in the full design cycle—from microarchitecture discussions to synthesis and timing feedback. You do not necessarily need prior ML/AI hardware experience; just the ability to learn quickly in a fast-paced, high-autonomy environment. We are looking for Fall '26, Spring '27, and Summer '27 interns.

## What they're looking for

- Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field
- Familiarity with high-speed digital logic
- Exposure to ASIC or SoC design concepts
- Familiarity with SystemVerilog, UVM, or Python
- Familiarity with verification work and writing test benches
- Familiarity with physical design flows and tooling

Tags: ASIC