# Senior Serdes Characterization & Post-Silicon Validation Engineer at K2 Space

- Company: K2 Space
- What the company does: Building the largest satellites in orbit. Ultra-powerful, scalable platforms engineered for LEO, MEO, GEO and cislunar missions. Explore the next-generation of satellites. Backed by Kleiner Perkins, First Round and ICONIQ.
- Company website: https://www.k2space.com/#
- Type: Startups
- Level: Senior
- Location: Seattle, WA
- Work setup: On-site
- Pay: $170K to $250K base salary per year (USD)
- Posted: 2026-09-17
- Apply by: 2026-11-01
- Apply: https://job-boards.greenhouse.io/k2spacecorporation/jobs/5427374008
- Page: https://www.1752.vc/careers/jobs/k2-space-senior-serdes-characterization-and-post-silicon-validation-engineer-2/

## About the role

With multiple launches in 2027 and plans to scale to 100 satellites a year, we're Building Bigger — helping develop the solar system and build toward a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a high-growth Series D-funded company, we'd love for you to apply.

## What they're looking for

- Lead post-silicon bring-up and characterization of high-speed NRZ and PAM4 SerDes, including 112G-class interfaces
- Develop and execute electrical characterization plans across lanes, data rates, voltage, temperature, channels, and operating conditions
- Characterize TX eye quality, jitter, output amplitude, linearity, equalization, RX sensitivity, BER, bathtub curves, CDR performance, and link margin
- Validate TX/RX equalization including FFE, CTLE, DFE, adaptation, and link-training behavior
- Perform BER and stress testing across representative and worst-case channels
- Debug complex link issues spanning SerDes IP, clocks, power, package, PCB/channel, firmware, and digital logic

Tags: Silicon