# Digital Verification Engineer at Nexthop AI

- Company: Nexthop AI
- What the company does: Backed by a16z, Kleiner Perkins and Lightspeed.
- Company website: https://nexthop.ai/
- Type: Startups (AI role)
- Level: Mid level
- Location: Santa Clara, California
- Work setup: On-site
- Posted: 2026-07-22
- Apply by: 2026-10-08
- Apply: https://nexthopai.bamboohr.com/careers/100
- Page: https://www.1752.vc/careers/jobs/nexthop-ai-digital-verification-engineer/

## About the role

At Nexthop AI, the correctness of our digital logic is non-negotiable — a single functional escape in an FPGA or ASIC can compromise an entire switching platform once it ships. We are looking for a Digital Verification Engineer to own the verification environments and test suites that prove our digital subsystems behave exactly as designed.

## What they're looking for

- Own the testbench: Design, build, and maintain the verification environments for our digital subsystems — from block level through full-chip / subsystem integration — for both FPGA and ASIC targets
- Reusable methodology: Establish and evolve reusable verification components (drivers, monitors, scoreboards, checkers) so new blocks plug into a consistent, maintainable framework instead of one-off testbenches
- Reference modeling: Develop behavioral / reference models where needed to independently predict expected DUT behavior and catch discrepancies automatically
- Test suites: Author directed and constrained-random tests that exercise functional modes, corner cases, error injection, and reset / clock-domain behavior
- Coverage-driven closure: Define functional and code-coverage goals and drive them to closure — identifying coverage holes and writing the stimulus to fill them
- Assertions: Embed assertions (SVA) to catch protocol and interface violations at the source, close to where they occur

Tags: Engr HW