# ASIC Physical Design Engineer - DFT, Senior at Positron AI

- Company: Positron AI
- What the company does: About Positron AI Positron AI is building next-generation AI inference accelerators designed from the ground up for low-latency, high-throughput large language model inference. Backed by NEA.
- Company website: https://www.positron.ai/
- Type: Startups (AI role)
- Level: Senior
- Location: Remote (United States)
- Work setup: Remote
- Pay: $200K to $300K base salary per year (USD)
- Posted: 2026-09-29
- Apply by: 2026-11-23
- Apply: https://ats.rippling.com/positron/jobs/a4bcfaba-86b4-4cd1-8fdb-b972b111010c?utm_source=1752vc&utm_medium=careers
- Page: https://www.1752.vc/careers/jobs/positron-ai-design-for-test-dft-engineer-senior/

## About the role

As Senior DFT Engineer, you'll own DFT implementation end-to-end: defining the DFT micro-architecture for our accelerators, developing and integrating it into internal RTL and third-party IP, driving implementation with our backend design partner, and ensuring high-quality silicon bring-up through comprehensive pre-silicon validation. This is a hands-on, technical ownership role from definition through tapeout and into first silicon, not a coordination role. Found on 1752vc Careers, the job board for startup and VC roles.

## What they're looking for

- A BS, MS, or PhD in Electrical Engineering or Computer Engineering
- 8+ years of ASIC development experience
- Extensive hands-on DFT implementation experience on complex SoCs, with multiple successful production tapeouts
- Deep understanding of scan architectures and their implementation, including ATPG, memory BIST (including repair), boundary scan, IJTAG, EDT, various fault models, and structural coverage analysis
- Hands-on experience with Siemens Tessent DFT solutions (SSN, EDT, MBIST, RTLpro, Scanpro, Tessent Diagnosis) is required
- Strong RTL design skills using Verilog/SystemVerilog

Tags: Engineering

Source: 1752vc Careers, https://www.1752.vc/careers/jobs/positron-ai-design-for-test-dft-engineer-senior/