# RTL SoC Design Intern at Quadric.io

- Company: Quadric.io
- What the company does: Your silicon. Your models. Your roadmap. Flexible AI accelerator IP that is powering the next generation of AI chips. Backed by Pear VC.
- Company website: https://www.quadric.io/
- Type: Startups
- Level: Internship
- Location: Burlingame, CA (HQ)
- Work setup: On-site
- Pay: $50 to $57/hr (USD)
- Posted: 2026-09-23
- Apply by: 2026-11-07
- Apply: https://jobs.ashbyhq.com/quadric/8bc97324-bcdb-4680-a03c-4c6e590644c2
- Page: https://www.1752.vc/careers/jobs/quadric-io-rtl-soc-design-intern/

## About the role

This is a chance to get hands-on experience building a next-generation SoC architecture from the ground floor, working directly alongside our hardware team as we bring supercomputer technology to the Edge. You'll support the SoC design team with subsystem development, third-party IP integration, and PPA (power, performance, area) optimization for Quadric's GPNPU platform — gaining exposure to real front-end design and integration methodologies, and working closely with the architects who define the chip.

## What they're looking for

- Required
- Currently pursuing a Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or a related field
- Familiarity with SoC/ASIC front-end design concepts
- Proficient in SystemVerilog or Verilog
- Prepared to collaborate with architects and designers on subsystem development and integration tasks
- Demonstrated capability in problem-solving, debugging, and clear technical communication

Tags: Engineering Hardware