# Principal FPGA Emulation Engineer at Renesas Electronics

- Company: Renesas Electronics
- What the company does: Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial,...
- Company website: https://www.renesas.com
- Type: Startups
- Level: Principal and up
- Location: Austin, TX
- Work setup: On-site
- Posted: 2026-09-25
- Apply by: 2026-11-09
- Apply: https://jobs.smartrecruiters.com/RenesasElectronics/744000151949089
- Page: https://www.1752.vc/careers/jobs/renesas-electronics-principal-fpga-emulation-engineer/

## About the role

Renesas is seeking a Principal FPGA Emulation & Prototyping Engineer to build and own the FPGA-based platforms that emulate our mixed-signal power ASICs before silicon. Working shoulder to shoulder with our silicon RTL and DSP architects, you will bring their designs up on FPGA to validate real-time digital, mixed-signal, and power-control architectures pre-silicon — proving out control loops, catching RTL issues early, and de-risking tape-out.

## What they're looking for

- Extensive FPGA design and implementation experience (typically 10+ years), including a track record of FPGA prototyping or emulation of ASIC/SoC designs
- Expert-level RTL design in SystemVerilog and/or VHDL, with deep familiarity working from ASIC-style RTL
- Hands-on experience adapting ASIC RTL for FPGA: clock-gating conversion, memory macro replacement, reset schemes, tri-state conversion, and multi-clock/CDC handling
- Strong command of the full FPGA implementation flow — synthesis, place-and-route, timing analysis, and constraint development (XDC/SDC) — on large Xilinx and/or Intel (Altera) devices, using Vivado and/or Quartus
- Hardware bring-up and debug experience: in-system logic analysis (ILA/SignalTap), lab instrumentation, and long-run pre-silicon debug
- Proficiency scripting for automation (TCL, Python)

