# (Sr.) Staff Package Design Engineer - MIS Substrate/FC Expose Die (Experienced in Power or Gan Is Requried) at Renesas Electronics

- Company: Renesas Electronics
- What the company does: Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial,...
- Company website: https://www.renesas.com
- Type: Startups
- Level: Senior
- Location: Taichung, Taichung City
- Work setup: On-site
- Posted: 2026-10-08
- Apply by: 2026-11-22
- Apply: https://jobs.smartrecruiters.com/RenesasElectronics/744000154394814?utm_source=1752vc&utm_medium=careers
- Page: https://www.1752.vc/careers/jobs/renesas-electronics-sr-staff-package-design-engineer-mis-substrate-fc-expose-die/

## About the role

• Design and develop package and interconnect methods for Renesas’s packaging needs in the areas of Power SiP/modules, wafer level, flip-chip, multi-chip module and power device packaging, GaN related PKG is a plus. • Package technologies qualification for consumer & industrial power as well as automotive power applications. Found on 1752vc Careers, the job board for startup and VC roles.

## What they're looking for

- Doctorate/Masters / Bachelor’s degree in Physics, Chemistry, Mechanical, Electrical or Materials Engineering
- 10 years of relevant experience in package development emphasizing power SiP/module, wafer level & flip-chip packaging
- Strong understanding of power SiP/modules, wafer level/flip-chip packaging methods, assembly process knowledge, qualification methods, SPC and statistical analysis software
- Strong interpersonal and communication skills
- Strong analytical and presentation skills
- Knowledge of wire-bonding & multi-chip module technologies is a plus


Source: 1752vc Careers, https://www.1752.vc/careers/jobs/renesas-electronics-sr-staff-package-design-engineer-mis-substrate-fc-expose-die/