# PhD Engineering Internship 2027 at Riverlane

- Company: Riverlane
- What the company does: Backed by Amadeus Capital Partners.
- Company website: https://riverlane.com
- Type: Startups
- Level: Internship
- Location: Boston, MA
- Work setup: On-site
- Posted: 2026-10-20
- Apply by: 2026-12-04
- Apply: https://www.riverlane.com/jobs?gh_jid=5010275101&utm_source=1752vc&utm_medium=careers#vacancies
- Page: https://www.1752.vc/careers/jobs/riverlane-phd-engineering-internship-2027/

## About the role

Delivering practical quantum error correction requires tightly integrated quantum and classical systems. Decoding algorithms must process large volumes of error data within demanding latency, bandwidth, compute and power constraints. As an engineering Intern, you will investigate the classical computing architectures needed to support scalable, fault-tolerant quantum computers. Your project will sit at the intersection of quantum error correction, computer architecture and hardware-software co-design. Found on 1752vc Careers, the job board for startup and VC roles.

## What they're looking for

- Contribute to a research project focused on the classical systems and architectures required for scalable quantum error correction
- Investigate methods for reducing the compute, communication, memory, latency or power requirements associated with QEC
- Develop algorithms, simulations or architectural models to evaluate potential approaches
- Explore trade-offs between decoding performance, logical error suppression and classical resource requirements
- Consider how QEC workloads could be implemented across software, FPGA, ASIC or other computing architectures
- Collaborate with researchers and engineers working across QEC theory, decoding, software and hardware

Tags: Internships

Source: 1752vc Careers, https://www.1752.vc/careers/jobs/riverlane-phd-engineering-internship-2027/