# 3D Stacked DRAM Design Engineer at SK Hynix

- Company: SK Hynix
- Company website: https://www.skhynix.com
- Type: Startups
- Level: Mid level
- Location: San Jose, CA
- Work setup: On-site
- Posted: 2026-07-16
- Apply by: 2026-10-12
- Apply: https://job-boards.greenhouse.io/skhynixamerica/jobs/5362335008
- Page: https://www.1752.vc/careers/jobs/sk-hynix-3d-stacked-dram-design-engineer/

## About the role

To strengthen leadership in the DRAM-on-Logic era through optimized DRAM die design, we are seeking talent capable of driving the co-design of 3D-stacked DRAM logic dies in close collaboration with U.S.-based customers. This strategic hiring initiative aims to enhance our global competitiveness by fostering deep engagement with key American clients, ensuring that our die design solutions are precisely aligned with their evolving technical requirements and market demands.

## What they're looking for

- Bachelor’s degree or higher in Electrical Engineering or a related discipline with 4+ years of relevant experience
- Development of DRAM and design DRAM circuit based on custom design methodology (using virtuoso [or similar tools], spice simulator)
- Experience reviewing DRAM specifications and architecture
- Circuit design experience to meet internal and external requirements for DRAM products
- Experience evaluating compliance with DRAM specifications through design analysis at the wafer levels test / package levels test / system level test
- Experience in full custom + digital Co-design and PDN analysis

Tags: Engineering