# 3D Stacked Logic Design Engineer at SK Hynix

- Company: SK Hynix
- Company website: https://www.skhynix.com
- Type: Startups
- Level: Mid level
- Location: San Jose, CA
- Work setup: On-site
- Posted: 2026-07-16
- Apply by: 2026-10-12
- Apply: https://job-boards.greenhouse.io/skhynixamerica/jobs/5362345008
- Page: https://www.1752.vc/careers/jobs/sk-hynix-3d-stacked-logic-design-engineer/

## About the role

To strengthen leadership in the DRAM-on-Logic era through optimized DRAM die design, we are seeking talent capable of driving the co-design of 3D-stacked DRAM logic dies in close collaboration with U.S.-based customers. This strategic hiring initiative aims to enhance our global competitiveness by fostering deep engagement with key American clients, ensuring that our die design solutions are precisely aligned with their evolving technical requirements and market demands.

## What they're looking for

- Bachelor’s degree or higher in Electrical Engineering or a related discipline with 5+ years of relevant experience
- Development of Digital Logic IP/SoC based on Hardware Description Languages (Verilog, VHDL)
- Experience in RTL design and implementation memory PHY, hard macro IP for high-speed circuit, or high-speed digital IP design
- Experience with memory controllers
- Experience in memory Built-in Self-Test (BIST), DRAM Design for Test (DFT) / Design for Debug (DFD)
- Deep understanding of PPA analysis and optimization, and physical design

Tags: Engineering