# Physical Design CPU Methodology Engineer at TensTorrent

- Company: TensTorrent
- What the company does: Tenstorrent is a next-generation computing company that builds computers for AI. Headquartered in the U.S. with offices in Austin, Texas, and Silicon Valley, and global offices in Toronto, Belgrade, Seoul, Tokyo, and Bangalore, Tenstorrent brings together...
- Company website: https://tenstorrent.com
- Type: Startups
- Level: Mid level
- Location: Santa Clara, California, United States
- Work setup: On-site
- Pay: $100K to $500K base salary per year (USD)
- Posted: 2026-09-10
- Apply by: 2026-10-25
- Apply: https://job-boards.greenhouse.io/tenstorrent/jobs/5210079007
- Page: https://www.1752.vc/careers/jobs/tenstorrent-physical-design-cpu-methodology-engineer/

## About the role

Tenstorrent is looking for a Physical Design CPU Methodology Engineer who defines and drives the implementation methodology, automation strategy, and signoff infrastructure for high-performance CPU cores across advanced process nodes. This role combines deep physical design expertise with organization-level technical leadership, enabling predictable RTL-to-GDS execution, strong PPA outcomes, and scalable methodology adoption across multiple projects and teams.

## What they're looking for

- You are an experienced Physical Design Engineer with 10+ years of ASIC/SoC/CPU experience, ideally focused on high-performance CPUs or similarly complex digital designs
- You bring deep expertise across RTL-to-GDS implementation and signoff, including timing closure, power optimization, SI, EM/IR, extraction, and physical verification
- You have built or owned physical design methodology, automation, or CAD flows and are highly skilled in Tcl, Python, Perl, or similar scripting languages
- You are a technical leader who can influence across teams, mentor engineers, and drive standards across geographically distributed organizations
- Define and own scalable CPU physical design methodology spanning synthesis, floorplanning, power planning, place and route, CTS, extraction, STA, SI, EM/IR, and physical verification
- Explore AI/ML-enabled PD tooling, begin synthesis and PnR of CPU partitions, and start developing the new program RM flow

Tags: Architecture