# Sr. Engineer, CPU RTL Design at TensTorrent

- Company: TensTorrent
- What the company does: Tenstorrent is a next-generation computing company that builds computers for AI. Headquartered in the U.S. with offices in Austin, Texas, and Silicon Valley, and global offices in Toronto, Belgrade, Seoul, Tokyo, and Bangalore, Tenstorrent brings together...
- Company website: https://tenstorrent.com
- Type: Startups
- Level: Senior
- Location: Austin, Texas, United States; Santa Clara, California, United States
- Work setup: On-site
- Pay: $100K to $500K base salary per year (USD)
- Posted: 2026-05-22
- Apply by: 2026-10-08
- Apply: https://job-boards.greenhouse.io/tenstorrent/jobs/5145404007
- Page: https://www.1752.vc/careers/jobs/tenstorrent-sr-engineer-cpu-rtl-design/

## About the role

We are looking for a talented engineer to join our CPU design team to define and implement RTL for high-performance CPUs. You’ll work on a CPU based on RISC-V ISA, collaborating with DV, PD, and performance teams to deliver a functional, timing, and power-converged design. This role is hybrid, based out of Austin, TX or Santa Clara, CA.

## What they're looking for

- Experienced in CPU microarchitecture with expertise in Rename, Scheduler, ROB, Load Store, Branch Prediction, Cache or Datapath
- Skilled in RTL coding (Verilog/VHDL) and familiar with industry-standard tools for simulation, synthesis, and power analysis
- Proficient in debugging RTL/logic across multiple design hierarchies and pre/post-silicon environments
- Background in microarchitecture definition, design specification, and performance-driven trade-off analysis

Tags: RISC V