# Design Verification Engineer- AI Accelerator at Velaura AI

- Company: Velaura AI
- What the company does: Backed by MVP Ventures.
- Company website: https://velaura.ai
- Type: Startups (AI role)
- Level: Mid level
- Location: Santa Clara, CA
- Work setup: On-site
- Pay: $200K to $300K base salary per year (USD)
- Posted: 2026-08-19
- Apply by: 2026-10-14
- Apply: https://jobs.lever.co/velaura/e2609b57-711d-400e-b8e9-79ec4f1d6a7b
- Page: https://www.1752.vc/careers/jobs/velaura-ai-design-verification-engineer-ai-accelerator/

## About the role

We are looking for talented Design Verification Engineers to help verify and deliver Velaura's next generation Physical AI SoC. You will work closely with architects, RTL engineers, software engineers and system teams to establish confidence in the correctness, performance, reliability and safety of the design, from individual RTL blocks through complete hardware and software systems running real workloads.

## What they're looking for

- 8 or more years verifying high performance compute or complex digital designs
- High level understanding of LLMs including transformer structure and inference data flow
- Knowledge of GEMM and GEMV operations and how they map onto hardware
- Experience with SystemVerilog, UVM, C and C++, assertions and coverage driven verification
- Experience building or using reference models in C, C++ or Python
- Understanding of numerical formats and precision tradeoffs such as FP16, BF16, FP8 and INT8

Tags: DV