# SOC Design Verification Engineer at Velaura AI

- Company: Velaura AI
- What the company does: Backed by MVP Ventures.
- Company website: https://velaura.ai
- Type: Startups
- Level: Mid level
- Location: Santa Clara, CA
- Work setup: On-site
- Pay: $200K to $300K base salary per year (USD)
- Posted: 2026-09-15
- Apply by: 2026-10-30
- Apply: https://jobs.lever.co/velaura/1667421d-50e4-41a8-9925-f2b7c2f1e33f
- Page: https://www.1752.vc/careers/jobs/velaura-ai-soc-design-verification-engineer/

## About the role

We are looking for talented Design Verification Engineers to help verify and deliver Velaura's next generation Physical AI SoC. You will work closely with architects, RTL engineers, software engineers and system teams to establish confidence in the correctness, performance, reliability and safety of the design, from individual RTL blocks through complete hardware and software systems running real workloads.

## What they're looking for

- 10 or more years in design verification, including significant SoC level experience
- Experience leading or participating in multiple SoC verification projects, including sign off and tape out
- Experience with SystemVerilog, UVM, C and C++ and coverage driven verification at system level
- Experience managing simulation flows on CPU based SoCs such as ARM or RISC-V
- Knowledge of IO and memory subsystem IP such as PCIe and LPDDR5 or LPDDR6
- Experience verifying boot sequences and root of trust

Tags: DV