Backed by a16z.
About the role
We are looking for a Physical Design Lead — Execution (Principal/Sr. Principal Engineer) to drive the day-to-day physical design execution and delivery that gets Altera's chips across the finish line. This is a senior individual-contributor role for an engineer who thrives in the trenches of block and full-chip closure — someone who can take ownership of a design's execution, hold the schedule and quality bar under pressure, and be the steady hand design teams turn to when timelines get tight.
What they're looking for
- A strong physical design execution track record, with direct accountability for schedule and quality outcomes across blocks and full chip
- Demonstrated ability to deliver under schedule pressure without compromising quality, including experience managing critical-path recovery
- Hands-on expertise across the physical design flow — floorplanning, placement, clock-tree synthesis, routing, and timing/power closure — and how these interact with signoff
- Working command of the horizontal signoff flows that gate tapeout: timing closure (STA), EMIR, physical verification, formal equivalence, and low-power verification
- Scripting and automation proficiency (Python, Tcl, Perl, or shell) sufficient to build and debug execution tooling, not only to run it
- Experience driving execution on designs of high complexity with concurrent block teams across multiple sites
More about this role
Altera builds the programmable logic and adaptive computing solutions that power the world's most demanding systems — from data centers and networking infrastructure to automotive, aerospace, and industrial applications. As an independent FPGA leader, we combine decades of silicon expertise with a startup's focus on speed and innovation. Our engineers work at the edge of process technology and design methodology to deliver silicon that customers can trust, on schedule, every time.
We are looking for a Physical Design Lead — Execution (Principal/Sr. Principal Engineer) to drive the day-to-day physical design execution and delivery that gets Altera's chips across the finish line. This is a senior individual-contributor role for an engineer who thrives in the trenches of block and full-chip closure — someone who can take ownership of a design's execution, hold the schedule and quality bar under pressure, and be the steady hand design teams turn to when timelines get tight. You will be the connective tissue between physical design blocks and full-chip integration, with a clear growth path toward owning full-chip implementation scope.
Because this role also represents Altera's physical...
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