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About the role
Altera is seeking a highly motivated Senior Physical Design Engineer to join our Physical Design organization. In this role, you will be responsible for implementing custom IP and SoC designs from RTL through GDSII, driving physical implementation, timing closure, power optimization, and design signoff for next-generation FPGA products.
What they're looking for
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline
- 6+ years of hands-on experience with digital ASIC or SoC physical design implementation
- 6+ years of experience performing RTL-to-GDSII physical design flows
- 6+ years of experience with synthesis, floorplanning, place and route, and clock tree synthesis (CTS)
- 6+ years of experience performing static timing analysis (STA) and timing closure
- 4+ years of experience with physical verification, including DRC, LVS, ERC, and signoff methodologies
More about this role
At Altera™, our independence as the world’s largest pure ‑ play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industry ‑ leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. As an independent company, we move faster, invest deeper, and partner more closely—empowering our teams to drive breakthrough innovation and shape the future of the FPGA industry.
Altera is seeking a highly motivated Senior Physical Design Engineer to join our Physical Design organization. In this role, you will be responsible for implementing custom IP and SoC designs from RTL through GDSII, driving physical implementation, timing closure, power optimization, and design signoff for next-generation FPGA products. You will collaborate closely with RTL designers, Design Verification, DFT, Timing, and CAD teams to deliver high-quality silicon while contributing to the continuous improvement of physical design methodologies and automation.
This role is ideal for an engineer...
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