Startups · AI

Senior Software Architect, Physical AI

Altera · San Jose, California, United States · On-site

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About Altera

Backed by a16z.

About the role

As software architect, define and guide SDK architecture, APIs, hardware abstraction, device discovery, lifecycle management, diagnostics, and plugin interfaces. Architect high-performance modules for sensor ingestion, camera and video pipelines, ISP, compression, memory and buffer management, synchronization, networking, localization, and AI pre-processing.

What they're looking for

  • Bachelor's Degree in Computer Science, Computer Engineering, Electrical Engineering, or a related field, plus 15+ years of relevant experience
  • Strong C++ and Linux systems-development skills, including concurrency, performance optimization, and debugging
  • Experience designing and shipping SDKs, middleware, runtimes, device frameworks, or developer-facing platform software
  • Understanding of heterogeneous data movement across CPU, GPU, FPGA, DMA, shared memory, and high-speed I/O
  • Experience with Holoscan, ROS 2, GStreamer, ffmpeg, OpenCV, or a comparable robotics or real-time framework
  • Experience with hardware-accelerated video, vision, sensor, networking, or signal-processing pipelines
More about this role

Altera is seeking a Senior Software Architect to help build our Physical AI SDK—a developer-facing platform that enables robotics and drones applications to use FPGA acceleration through portable, composable, high-performance APIs.

You will connect frameworks such as NVIDIA Holoscan, ROS 2, Linux, and ONNX Runtime to Altera FPGA platforms. This hands-on role combines software architecture, production development, hardware/software integration, and customer-focused solution delivery.

As software architect, define and guide SDK architecture, APIs, hardware abstraction, device discovery, lifecycle management, diagnostics, and plugin interfaces.

Architect high-performance modules for sensor ingestion, camera and video pipelines, ISP, compression, memory and buffer management, synchronization, networking, localization, and AI pre-processing.

Work with the engineering to integrate FPGA acceleration into Holoscan and ROS 2 workflows, including minimum or zero-copy data paths, DMA, metadata, timestamping, QoS, and deterministic execution.

Help develop Linux-based C++ libraries, Python bindings, utilities, deployment tools, and take responsibility of documentation, and reference...

Read the full posting on Altera's site ↗

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