Cadence delivers remote patient monitoring and chronic disease management that improves outcomes and reduces cost at scale. Intelligent senior care that works better by working ahead. Backed by General Catalyst.
About the role
Join our team of layout designers creating challenging IP designs for the consumer, industrial, and automotive markets. Our designs are fabricated in the world’s leading edge silicon processes for companies ranging from large multinational companies to hot start-ups. Learn on-the-job how to apply your engineering background to create these robust high performance analog designs. Working with experienced skilled designers, you will be part of the design team using Cadence design tools. Found on 1752vc Careers, the job board for startup and VC roles.
What they're looking for
- Implementing high speed and high accuracy cells, blocks and IP blocks in a timely fashion with high quality and efficiency
- Working with custom layout designers from groups all over the world to build high quality IP and test-chips
- Working with circuit designers from groups all over the world to understand their technical and schedule needs
- Collaborating with the Cadence R&D teams (Virtuoso, PVS developers) to help develop the layout editing and verification tools
- BSEE, MSEE
- Exposure to microelectronics design and requirements
More about this role
Join our team of layout designers creating challenging IP designs for the consumer, industrial, and automotive markets. Our designs are fabricated in the world’s leading edge silicon processes for companies ranging from large multinational companies to hot start-ups. Learn on-the-job how to apply your engineering background to create these robust high performance analog designs. Working with experienced skilled designers, you will be part of the design team using Cadence design tools. We are looking for a layout engineer capable of producing quality layouts of analog/mixed-signal circuit blocks, working in collaboration with circuit designers. Responsibilities include all facets of the back-end flow, from initial floor planning through detailed layout and final verification of conformance to foundry design rules.
The Cadence IP Group custom layout team develops and delivers a variety of high-quality high speed and high accuracy CMOS integrated circuits IP for several foundries and process nodes down to 5n and even below. We are deeply involved in finfet layout and even beyond (gate all-around).
As part of Cadence, the Cadence IP group custom layout team not only has access to all...
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