Density shows you how people use your space and helps you get more out of every square foot. Backed by Kleiner Perkins and South Park Commons.
About the role
We're looking for an experienced Design Verification engineer with at least 5 years of pre-silicon verification experience in end to end verification for complex IP, subsystems, and/or SoC system level verification from plan to functional closure. This is a senior individual-contributor role and you'll partner closely with our HW-design and software teams, driving DensityAI's AI accelerator program from first silicon through scale-out.
What they're looking for
- Block Level/Sub System Verification
- CPU Subsystem/IP integration
- SoC/full-chip Verification
- Emulation testing
- DMA/NoC Verification
- Multi-SoC/Die to Die protocol verification
More about this role
We're looking for an experienced Design Verification engineer with at least 5 years of pre-silicon verification experience in end to end verification for complex IP, subsystems, and/or SoC system level verification from plan to functional closure. This is a senior individual-contributor role and you'll partner closely with our HW-design and software teams, driving DensityAI's AI accelerator program from first silicon through scale-out.
Own an entire testing domain based on your expertise
Develop end to end testing strategy from IP to SOC-level and to emulation for our AI accelerator silicon
Use and develop AI-assisted tool flows to accelerate verification and emulation timeline
Block Level/Sub System Verification
CPU Subsystem/IP integration
SoC/full-chip Verification
Emulation testing
DMA/NoC Verification
Multi-SoC/Die to Die protocol verification
Debug for functional closure of complex design or SOCs
Proven records on end-to-end pre-silicon verification ownership and deliverables
Strong Interest in optimizing Verification techniques and life cycle using the latest agentic/AI assisted flows
Exceptional abilities in analyzing and understanding specification from both hardware and...
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