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Substrate IC Package Layout Design Engineer

Etched · San Jose · On-site

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About Etched

Co-designed chips, racks, and software to push the pareto frontier to best-in-class throughput and interactivity. Backed by Kleiner Perkins and Sequoia.

About the role

Lead the design and development of complex IC substrate layouts for high-power AI processors and accelerators. Design large (>50mm) and complex multi-layer substrate packages with high pin counts and dense routing requirements.

What they're looking for

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field
  • 10+ years of experience in IC substrate layout design for high-performance processors or accelerators
  • Extensive experience with large substrate packages (>50mm) and complex high-density layouts
  • Proven experience with high-power (700W+) package designs and robust power delivery networks
  • Expertise in high-speed signaling design (>50GHz) and mitigating signal integrity challenges (crosstalk, reflections, impedance mismatches)
  • Strong experience with CoWoS (Chip-on-Wafer-on-Substrate) interposer design and the impact of the substrate design to support CoWos
More about this role

Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference . Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.

Job Summary

As a Substrate IC Package Layout Design Engineer you will be responsible for the end-to-end design of complex IC substrate packages, supporting high-power consumption and high-speed signaling. The ideal candidate will have extensive experience with large substrate designs (>50mm), complex power delivery networks, and high-speed signaling solutions (up to and beyond 50GHz). You will work closely with silicon, signal integrity, power integrity, and system help co-design world class substates with OSAT providers. Intense focus on optimization for power delivery through substrate, pushing what’s possible.

IC Substrate Layout Design

Lead the design and development of complex IC substrate layouts for high-power AI processors and accelerators.

Design...

Read the full posting on Etched's site ↗

Architecture

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