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Hardware Engineer, TPU Interconnect and Packaging

Google · United States · On-site

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About Google

Learn more about Google. Explore our innovative AI products and services, and how we. Backed by Kleiner Perkins.

About the role

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. Found on 1752vc Careers, the job board for startup and VC roles.

What they're looking for

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
  • 10 years of experience with semiconductor packaging, integration, or interconnect design
  • Experience with interconnect modeling, 2.5D/3D interposer design rules, or chiplet package assembly
More about this role
  • Define the architectural strategy and package technology selection for next-generation TPU systems, incorporating 2.5D/3D interposers, embedded bridges, and CPO modules.
  • Drive electro-optical co-design across silicon photonics dies, laser sources, package substrates, and drive electronics to maximize interconnect bandwidth density and energy efficiency.
  • Establish signal integrity, power delivery, thermal management, and mechanical robustness design rules across multi-chiplet heterogeneous assemblies.
  • Partner with OSAT vendors, foundries, and optical component suppliers to co-develop custom substrate processes, sub-micron alignment flows, and optical coupling interfaces.
  • Lead full-lifecycle technology qualification from pathfinding and architectural simulation through to mass production readiness.
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 10 years of experience with semiconductor packaging, integration, or interconnect design.
  • Experience with interconnect modeling, 2.5D/3D interposer design rules, or chiplet package assembly.
  • Master's degree or PhD in Electrical...

Read the full posting on Google's site ↗

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