Startups · AI

Senior Signal Integrity Engineer

Graphcore · Austin, Texas, United States · On-site

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About Graphcore

Graphcore has built a new type of processor for machine intelligence to accelerate machine learning and AI applications for a world of intelligent machines. Backed by Air Street.

About the role

We are seeking a Senior Signal Integrity Engineer to develop, validate, and optimize high-speed signaling solutions across blade- and rack-level architectures for advanced compute platforms. This role sits at the intersection of silicon, package, interconnect, board, and system design , with a strong emphasis on hands-on measurement, simulation correlation, and cross-functional technical communication.

What they're looking for

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field
  • Strong experience in signal integrity for high-speed digital systems
  • Hands-on measurement expertise using VNAs, TDRs, BERTs, and high-speed oscilloscopes
  • Experience measuring and analyzing S-parameters, impedance profiles, eye diagrams, jitter, timing margins, insertion loss, return loss, and crosstalk
  • Knowledge of high-speed interfaces such as PCIe Gen4/5/6, Ethernet, DDR, SerDes , and related I/O technologies
  • Experience with SI/PI simulation tools such as HFSS, ADS, Sigrity, CST, SPICE , or equivalent
More about this role

We are seeking a Senior Signal Integrity Engineer to develop, validate, and optimize high-speed signaling solutions across blade- and rack-level architectures for advanced compute platforms. This role sits at the intersection of silicon, package, interconnect, board, and system design , with a strong emphasis on hands-on measurement, simulation correlation, and cross-functional technical communication.

  • End-to-end signal integrity analysis for blade- and rack-level system architectures.
  • Analyze and optimize high-speed and low-speed I/O interfaces, including PCIe Gen4/5/6, Ethernet, DDR, SerDes, SPI , I2C, etc . and related interconnects.
  • Perform time-domain and frequency-domain simulations using tools such as Ansys HFSS, Keysight ADS, Cadence Sigrity, CST, SPICE , or similar.
  • Support hands-on lab validation using VNA, TDR, BERT, and high-speed oscilloscopes .
  • Correlate simulation results with lab measurements to identify margin gaps, debug issues, and improve design methodology.
  • Collaborate with silicon, package, board, connector, cable, and system design teams to optimize I/O channel performance.
  • Work with interconnect vendors and ODMs to guide board layout,...

Read the full posting on Graphcore's site ↗

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