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Hardware/ Software Co-Design Engineer

Neuralink · Austin, Texas, United States; South San Francisco, California, United States · On-site

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About Neuralink

Creating a generalized brain interface to restore autonomy to those with unmet medical needs today and unlock human potential tomorrow. Backed by Lightspeed, Sequoia and Founders Fund.

About the role

Our Hardware/ Software Co-Design Engineer will be responsible for delivering micro-architecture and register-transfer level (RTL) implementation of digital IPs and systems with a focus in high-throughput low-power digital signal processor (DSP) and general-purpose hardware accelerators towards realizing state-of-the-art brain-computer interfaces.

What they're looking for

  • Bachelor of Science (B.S.) degree in Electrical Engineering and/or Computer Science or a related field, or equivalent experience
  • Evidence of exceptional ability in electrical engineering, computer science, or computer engineering
  • Experience designing and implementing embedded software in C or Rust
  • Expertise in SystemVerilog, C/C++, Python
  • Experience designing and implementing emulation models, transactors, and test environments to replicate hardware behavior
  • Experience working on complex digital systems from architecture, microarchitecture, and RTL, using industry standard tools
More about this role

We are creating devices that enable a bi-directional interface with the brain. These devices allow us to restore movement to the paralyzed, restore sight to the blind, and revolutionize how humans interact with their digital world.

The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-machine interface applications. We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future.

Our Hardware/ Software Co-Design Engineer will be responsible for delivering micro-architecture and register-transfer level (RTL) implementation of digital IPs and systems with a focus in high-throughput low-power digital signal processor (DSP) and general-purpose hardware accelerators towards realizing state-of-the-art brain-computer interfaces. Relevant product development experience in micro-architecture design for low-power processors, on-chip bus and network interfaces, audio/video compression processors, AI/ML accelerators, and communication PHY/MAC will be preferred.

  • Micro-architecture design and RTL...

Read the full posting on Neuralink's site ↗

Brain Interfaces Hardware

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