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Design for Test Lead

Neurophos · Austin, Texas · On-site

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About Neurophos

Neurophos develops photonic AI processing technology that focuses on hardware solutions for accelerating artificial intelligence inference by replacing traditional electronic compute elements with Optical Processing Units (OPUs). Backed by Purple Arch Ventures.

About the role

We're hiring a DFT Architect to own design-for-test for our electronic IC. You'll set the DFT strategy for the full chip, own coverage assessment and sign-off, and work with the RTL and physical design teams to build testability in from the start. This is our first dedicated DFT hire, so you'll define how test gets done here and grow the team that executes it, working directly with the analog team on their test requirements and owning the handoff into the post-silicon test program.

What they're looking for

  • 8 to 15 years in DFT, with hands-on ownership of scan, ATPG, and MBIST
  • Architect-level experience on a large digital ASIC: you've assessed a full chip, set the DFT strategy, and owned coverage signoff
  • Experience developing and specifying functional test vectors to augment structural coverage
  • Track record through tapeout on a complex compute ASIC
  • Analog test specification experience: defining what it takes to test analog circuits and working that out directly with the analog team
  • Cadence toolchain experience
More about this role

The demand for new data centers and AI compute is rapidly outpacing the planet's energy capacity. Digital solutions are hitting a power wall as we approach the physical limits of traditional silicon. Conquering this bottleneck means rethinking the fundamental architecture of inference compute. The industry's current path can't meet the need, so we're taking a different approach.

Instead of traditional electronic circuits, we use silicon photonics and an active, programmable metasurface to perform matrix multiplications at the speed of light. Our optical cells are 10,000x smaller than traditional photonic components, enabling unprecedented density. By using photonics instead of electricity, our chips become more efficient as they scale. This architecture will deliver up to 100 times the energy efficiency of existing solutions while significantly improving performance for large-scale AI inference.

We’ve assembled a world-class team of industry veterans and recently raised a $110M Series A led by Gates Frontier. Participants include M12 (Microsoft’s Venture Fund), Carbon Direct Capital, Aramco Ventures, Bosch Ventures, Tectonic Ventures, Space Capital, and others.

Join us and shape...

Read the full posting on Neurophos's site ↗

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