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Physical Design / Implementation Lead

Neurophos · Austin, Texas · On-site

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About Neurophos

Neurophos develops photonic AI processing technology that focuses on hardware solutions for accelerating artificial intelligence inference by replacing traditional electronic compute elements with Optical Processing Units (OPUs). Backed by Purple Arch Ventures.

About the role

Own physical design and implementation end-to-end, from synthesis through tapeout, on leading-edge process nodes (TSMC N3 strongly preferred; deep FinFET-class experience, 7nm–3nm, required). Optimize and automate our synthesis flow, and lead the intake of new process technology as we bring on new nodes.

What they're looking for

  • Track record leading physical design / implementation on large, complex SoCs through tapeout: as a back-end lead on a large SoC, or an equivalent composite of synthesis, timing closure, power, and physical-verification ownership at a senior level
  • Hands-on experience on advanced nodes, TSMC N3 strongly preferred, FinFET-class node experience (7nm–3nm) required
  • Deep power and clock design experience at scale, ideally from CPU-class or very large SoC work
  • A track record of leading and growing a team
  • Experience integrating analog/mixed-signal blocks into a digital implementation flow
  • Cadence toolchain experience
More about this role

The demand for new data centers and AI compute is rapidly outpacing the planet's energy capacity. Digital solutions are hitting a power wall as we approach the physical limits of traditional silicon. Conquering this bottleneck means rethinking the fundamental architecture of inference compute. The industry's current path can't meet the need, so we're taking a different approach.

Instead of traditional electronic circuits, we use silicon photonics and an active, programmable metasurface to perform matrix multiplications at the speed of light. Our optical cells are 10,000x smaller than traditional photonic components, enabling unprecedented density. By using photonics instead of electricity, our chips become more efficient as they scale. This architecture will deliver up to 100 times the energy efficiency of existing solutions while significantly improving performance for large-scale AI inference.

We’ve assembled a world-class team of industry veterans and recently raised a $110M Series A led by Gates Frontier. Participants include M12 (Microsoft’s Venture Fund), Carbon Direct Capital, Aramco Ventures, Bosch Ventures, Tectonic Ventures, Space Capital, and others.

Join us and shape...

Read the full posting on Neurophos's site ↗

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