About Positron AI Positron AI is building next-generation AI inference accelerators designed from the ground up for low-latency, high-throughput large language model inference. Backed by NEA.
About the role
We are looking for a Director of ASIC Design to drive the design, development, verification, and execution of high-performance AI inference chips. This role requires deep technical expertise in ASIC architecture and low-power design methodologies, along with a strong understanding of AI/ML workloads.
What they're looking for
- A degree in Electrical Engineering, Computer Engineering, or a related field
- 12+ years of experience in ASIC development, including at least 5 years in a leadership role
- A proven track record of delivering multiple ASIC/COT projects from concept to mass production
- Deep understanding of digital design, verification, physical design, and manufacturing processes
- Experience with leading AI accelerators, high-performance computing (HPC), or data center chip designs
- Strong knowledge of RTL design (Verilog/SystemVerilog), synthesis, and timing closure
More about this role
We are looking for a Director of ASIC Design to drive the design, development, verification, and execution of high-performance AI inference chips. This role requires deep technical expertise in ASIC architecture and low-power design methodologies, along with a strong understanding of AI/ML workloads. The ideal candidate will bring a proven track record of leading ASIC teams from concept through production in a startup or fast-paced environment, and will play a central role in shaping the technical direction and execution of Positron's silicon roadmap.
This is a remote position; however, candidates must be based in the Austin, Texas metropolitan area. This location requirement allows for occasional in-person collaboration, meetings, or team events as needed.
Technical Leadership & Architecture
- Lead the ASIC development team in the design, verification, and implementation of AI inference hardware.
- Define and specify ASIC architecture, microarchitecture, and roadmap in alignment with company goals and AI workload requirements.
- Optimize power, performance, and area (PPA) trade-offs to meet stringent AI inference requirements, including memory subsystem optimizations.
Execution &...
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