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Semiconductor Layout & Tape-Out Engineer

Renesas Electronics · Kodaira, JP · On-site

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About Renesas Electronics

Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial,...

About the role

The Layout Tape-Out Support Engineer is responsible for end-to-end tape-out execution for Gallium Nitride (GaN) technologies. This role supports multiple concurrent tape-out flows, ensuring accurate, high-quality mask data delivery while enabling effective collaboration across global and Japanese-speaking teams. Found on 1752vc Careers, the job board for startup and VC roles.

What they're looking for

  • Bachelor’s or Master’s degree in Electrical Engineering, Materials Science, Physics, or a related field
  • Familiarity with reticle design and mask data preparation flows is desirable, along with a basic understanding of mask data formats (e.g., MEBES/JobDeck) and mask house interactions
  • Proficiency in layout and verification tools such as Cadence and Calibre, as well as experience working in a Unix/Linux environment, is required, LEDIT experience is a plus
  • A quick learner with strong adaptability, excellent communication skills, and a self-motivated, proactive mindset
  • Japanese language proficiency required. Good communication skills in English, with the ability to effectively collaborate with internal English-speaking teams and stakeholders
  • Experience in foundry tape-out processes
More about this role

The Layout Tape-Out Support Engineer is responsible for end-to-end tape-out execution for Gallium Nitride (GaN) technologies. This role supports multiple concurrent tape-out flows, ensuring accurate, high-quality mask data delivery while enabling effective collaboration across global and Japanese-speaking teams.

Key Responsibilities

Layout & Design Support

Perform and support PCM (Process Control Monitor) layout development and verification. Design and maintain alignment mark layouts in compliance with lithography and process requirements. Support stepper reticle 1:1 aligner mask layout generation, validation, and optimization.

Run Design Rule Checks (DRC) and mask data validation.

Tape-Out Flow Management

Support tape-out operations across multiple flows, ensuring schedule adherence and high-quality deliverables. Collaborate with global and Japanese-speaking stakeholders to drive alignment across design, process, and mask vendors. Provide operational support for tape-out activities; Fluent communication skills in both Japanese and English are required.

Mask Data Preparation & Signoff

Execute mask data generation workflows in accordance with foundry requirements. Perform mask data...

Read the full posting on Renesas Electronics's site ↗

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