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Chip Design Engineer

Ricursive Intelligence · Palo Alto · On-site

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About Ricursive Intelligence

We develop frontier AI methods to reinvent chip development, collapsing traditional design timelines, closing the loop between AI and the hardware that fuels it, and enabling a Cambrian explosion of custom silicon. Backed by Lightspeed, Sequoia and Felicis.

About the role

We are hiring an engineer who deeply understands every step of the flow, from synthesis through tapeout, and who has personally fought complex blocks to closure at an advanced node. Your expertise will guide the design of self-improving systems that you will then use to build real silicon. Contribute to synthesis, DFT insertion, floorplanning, PDN design, placement, CTS, routing, and all electrical, timing, and physical signoff.

What they're looking for

  • BS in Electrical Engineering, Computer Engineering, Computer Science, or a closely related technical field
  • Day-one fluency in at least one production implementation and signoff stack with chip design tools and strong Tcl and Python scripting
  • Track record of successful chip design and tapeout: owned closure of complex blocks, subsystems, or full chips through complete signoff in advanced technology nodes, on silicon that taped out and shipped to production
  • Masters or PhD in EE, CE, CS, or a related field, with a focus on VLSI, physical design, or EDA/CAD algorithms
  • Deep expertise in high-performance compute silicon (e.g., ML accelerators, CPUs, GPUs, or large SoCs), including multi-voltage domain (UPF) design and 2.5D/3D integration with bump/RDL planning
  • Publications at major conferences (e.g., DAC, ICCAD, ISPD, DATE) demonstrating research strength in physical design or AI for chip design
More about this role

Ricursive Intelligence is a frontier AI lab building self-improving systems, starting with chip design. We are reinventing chip development and closing the loop between AI and the hardware that fuels it, recursively accelerating the path to artificial superintelligence. Backed by $335M from Sequoia, Lightspeed, DST, and NVIDIA Ventures, we are a small and fast-paced team where every hire shapes the work.

The company has unmatched talent density, including IMO, IPHO, and IOAA gold medalists, pioneers who made prior breakthroughs in chip design: AlphaChip (Nature 2021), ePlace (DAC Best Paper Nominee 2014), RL-CCD (DAC Best Paper 2023), INSTA (DAC Best Paper 2025), and C3PO (ASP-DAC Best Paper 2026), chip leads for Apple (iPhone, iPad, M1) and Google (TPU, OpenTitan), and top researchers and engineers from Anthropic, Google DeepMind, Stanford, and MIT.

We are hiring an engineer who deeply understands every step of the flow, from synthesis through tapeout, and who has personally fought complex blocks to closure at an advanced node. Your expertise will guide the design of self-improving systems that you will then use to build real silicon.

Contribute to synthesis, DFT insertion,...

Read the full posting on Ricursive Intelligence's site ↗

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