SiTime is a leader in MEMS timing solutions, having shipped billions of units. Learn about our silicon MEMS oscillators, TCXOs, OCXOs, MEMS resonators, clock generators, jitter cleaners, clock timing, timing clock, sitm stock, and much more. Backed by NEA.
About the role
As a Senior Verification Engineer , you will be part of a team developing MEMS timing ICs. It is not necessary to meet all job requirements to be a qualified candidate for the position. Found on 1752vc Careers, the job board for startup and VC roles.
What they're looking for
- MS (BS) degree in electrical/computer engineering or related fields with 5 (8) years of work experience doing verification in the semiconductor industry
- Good verbal and written communication skills in English
- Proficient in SystemVerilog and SystemVerilog OOP
- Fluency in utilizing scripting languages such as Perl / Python
- Proficient (through work experience) in verification using UVM
- Strong experience writing SystemVerilog Assertions (SVA)
More about this role
SiTime is the Precision Timing company.
Timing is the heartbeat of all electronics, ensuring performance, resilience and scalability. For decades, quartz devices, non-silicon technology, have kept systems in sync, but they struggle in harsher, more demanding environments. MEMS-based Precision Timing delivers greater accuracy, smaller size and resilience. Today, MEMS timing powers over 400 applications, including high-growth ones in AI datacenters, automated driving, industrial and humanoid robots, wearables and IoT.
Our semiconductor MEMS programmable solutions offer a rich feature set that enables customers to differentiate their products with higher performance, smaller size, lower power, and better reliability. With more than 4 billion devices shipped, SiTime is changing the timing industry. For more information, visit: www.sitime.com .
As a Senior Verification Engineer , you will be part of a team developing MEMS timing ICs. It is not necessary to meet all job requirements to be a qualified candidate for the position.
- Developing SV-RNM models for both analog and mixed-signal circuits
- Developing verification plan from chip or block specifications
- Developing UVM-based...
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