Sygaldry builds quantum-accelerated AI servers to exponentially speed up AI training and inference, cutting compute costs and improving energy efficiency. Backed by Y Combinator.
About the role
Design and evaluate quantum error correction schemes for novel hardware architectures with multiple qubit modalities Develop efficient protocols for fault-tolerance under hardware-specific constraints and noise models
What they're looking for
- A PhD in physics, applied physics, computer science, electrical engineering, or an equivalent degree in a similar field
- 5-10 years of experience in quantum error correction
- Publications in quantum error correction or related fields
- Possess a strong programming skills in a scientific computing environment
- Proven track record of successful cross-team collaborative projects
- Excellent written and verbal communication skills
More about this role
Sygaldry Technologies is building quantum-accelerated AI servers to exponentially speed up training and inference for AI. By integrating quantum and AI, we're accelerating the path to superintelligence, and addressing the problem of rising compute costs and energy bottlenecks. Sygaldry AI servers combine multiple qubit types within a single, fault-tolerant architecture to deliver the combination of cost, scale, and speed necessary for advanced AI applications. We pioneer new domains in physics, engineering, and AI, tackling the hardest challenges with a grounded, optimistic, and rigorous culture. We're looking for individuals ready to define the intersection of quantum and AI and drive its profound global impact.
Sygaldry Technologies is seeking an experienced scientist to serve as a Senior Quantum Error Correction Theorist. In this role, you will be responsible for developing quantum error correction schemes to integrate multiple complementary qubit modalities into a fault-tolerant architecture. This is a rare opportunity to join an early team and help lay the foundation for a new quantum computing paradigm.
Design and evaluate quantum error correction schemes for novel hardware...
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