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Principal FEOL/MOL integration Engineer

Tokyo Electron · Albany · On-site

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About the role

- Serve as the **principal technical authority** for FEOL/MOL integration, driving direction, priorities, and technical quality through hands-on execution and mentorship as a senior individual contributor (no direct reports). - **Define and build new process integration routes** across litho, etch, films, wets, and CMP for FEOL/MOL test vehicles, including flow definition, mask/reticle planning, and split strategy.

What they're looking for

  • - Demonstrated **FEOL/MOL process integration** experience with a strong track record of building new processing routes from flow definition through wafer execution. *(Required)*
  • - Experience **leading cross-functional or cross-BU technical projects**, including planning and scheduling. *(Required)*
  • - Lot management skills using SIVIEW MM/SM. *(Preferred)*
  • - Metrology and analysis tool operation, including inline CDSEM and cross-sectional SEM. *(Required)*
  • - Knowledge of experiment design (DOE) and techniques for tool and process optimization. *(Required)*
  • - EUV lithography and/or 193i immersion experience. *(Preferred)*
More about this role

Let’s search for your next career at TEL. Use the form below to search our current opportunities and then apply. Please consider joining our Talent Community so that we may continue to engage with you.

As a **Principal Process Integration Engineer** within our FEOL/Middle-of-Line process integration organization, you will operate as a senior individual contributor and technical authority for the team. This is a fab-facing role: you will define and stand up new process integration routes, build out electrical test (e-test) capability from the ground up, and serve as the principal technical owner for cross-business-unit (X-BU) programs that bring TEL's tool and process portfolio together on internal test vehicles.

You will work closely with TEL's onsite business units (BUs), factories, and ecosystem partners to verify and integrate processes that demonstrate the benefits of TEL technologies for advanced logic and memory devices. Success in this role means owning route architecture end to end — from flow definition through wafer execution, electrical characterization, and data-driven decision-making — and setting the technical standard for the engineers around you.

  • Serve as the...

Read the full posting on Tokyo Electron's site ↗

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