About TYLsemi, Inc. The Opportunity The AI infrastructure market is exploding. Every hyperscaler, every cloud provider, every AI company is building custom silicon. Backed by Matter Venture Partners.
About the role
In addition to cash compensation, this position is eligible for equity in the form of stock options, giving you the opportunity to share in the Company’s long-term growth and success.
What they're looking for
- Design, implement, and maintain Zephyr RTOS firmware for a platform management controllers, including device drivers, subsystem integration, and application-level services
- Write and upstream-quality-review drivers against Zephyr's driver model — devicetree bindings, Kconfig, init levels and priorities, struct device APIs
- Bring up and debug PCIe links on first silicon — LTSSM progression, link training failures, lane reversal and polarity, equalization, speed and width negotiation
- Implement and maintain PCIe host controller and endpoint drivers: enumeration, configuration space, BAR allocation, MSI/MSI-X interrupt routing, AER and error handling, ASPM and link power states
- Configure and validate IOMMU behavior — address translation, DMA remapping, device isolation domains, page-table management, fault reporting and recovery
- Develop system software across the boot and runtime path: bootloader, firmware-to-OS handoff, ACPI or device tree description, kernel drivers, and the DMA and memory-management interfaces they depend on
More about this role
About the role
We are building the software stack that runs on next-generation silicon. Based on Zephyr-platform management controller responsible for secure boot, system software on the application processor — bootloader, kernel drivers, PCIe subsystem, and IOMMU configuration — that turns raw silicon into a platform an operating system can run on.
What you’ll do
Firmware and platform control
- Design, implement, and maintain Zephyr RTOS firmware for a platform management controllers, including device drivers, subsystem integration, and application-level services.
- Write and upstream-quality-review drivers against Zephyr's driver model — devicetree bindings, Kconfig, init levels and priorities, struct device APIs.
System software and high-speed interconnect
- Bring up and debug PCIe links on first silicon — LTSSM progression, link training failures, lane reversal and polarity, equalization, speed and width negotiation.
- Implement and maintain PCIe host controller and endpoint drivers: enumeration, configuration space, BAR allocation, MSI/MSI-X interrupt routing, AER and error handling, ASPM and link power states.
- Configure and validate IOMMU behavior — address translation,...
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