Backed by a16z.
About the role
In this role, you will partner closely with customers, sales teams, and product engineering to drive successful design‑ins, accelerate time‑to‑market, and ensure customers realize the full value of Altera’s technology portfolio. Found on 1752vc Careers, the job board for startup and VC roles.
What they're looking for
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
- 10+ years of experience in FPGA design, digital logic design, embedded systems, or applications engineering
- Strong proficiency in RTL (Verilog/VHDL), timing analysis, synthesis, and FPGA implementation flows
- Experience with high‑speed interfaces (PCIe, DDR, Ethernet), embedded processors, or board‑level design
- Excellent communication, presentation, and customer‑facing skills
- Ability to travel to customer sites as needed
More about this role
Altera is seeking a highly skilled Field Applications Engineer (FAE) to support customers adopting our industry‑leading FPGA, SoC, and embedded solutions.
In this role, you will partner closely with customers, sales teams, and product engineering to drive successful design‑ins, accelerate time‑to‑market, and ensure customers realize the full value of Altera’s technology portfolio.
This is a customer‑facing, technically deep role ideal for engineers who enjoy solving complex system‑level challenges and influencing next‑generation semiconductor designs.
Serve as the primary technical interface for customers evaluating and designing with Altera FPGAs, SoCs, IP, and software tools.
Understand customer architectures, performance requirements, and design constraints to recommend optimal device families, IP blocks, and development flows.
Deliver technical presentations, hands‑on workshops, and product demonstrations tailored to customer needs.
Guide customers through feasibility analysis, device selection, and early‑stage design decisions.
Support customers through the full design cycle — from concept and RTL development to timing closure, power optimization, and board...
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