Arista Networks is an industry leader in data-driven, client-to-cloud networking for large data center, campus and routing environments. What sets us apart is our relentless pursuit of innovation. Backed by Accel and Greylock.
About the role
Working closely with cross-functional teams including software, product management, marketing, and manufacturing, our engineers innovate new system architectures and develop high-speed PCBs requiring state-of the-art signal integrity and power integrity design practices.
What they're looking for
- BSEE or MSEE
- 10+ years of relevant experience in hardware engineering
- Experience designing networking hardware, particularly involving 100G and 200G PAM4 Ethernet switching
- Embedded x86/ARM system design is highly desirable
- Experience designing 20+ layer count boards featuring 50G+ signals, and advanced PCB manufacturing technologies such as sequential lamination, HDI, and ultra-low-loss materials
- Experience working with multi-phase DC/DC’s for high current, high transient loads
More about this role
Who You’ll Work With
Working closely with cross-functional teams including software, product management, marketing, and manufacturing, our engineers innovate new system architectures and develop high-speed PCBs requiring state-of the-art signal integrity and power integrity design practices.
What You'll Do
Our Hardware Design Engineering team is at the forefront of developing high-speed networking and Ethernet products used in Enterprise campuses, hyperscale datacenters and bleeding edge AI clusters. The team is responsible for the end-to-end design and development of advanced hardware solutions that meet the demands of modern networking environments.
Candidates for this position would be responsible for the entire hardware design process:
- Authoring functional specifications of high power and high density Ethernet switches used in AI networks
- Selecting and qualifying components
- Schematic capture and tool-based design verification
- Working closely with eCAD teams on PCB layout and component footprints
- Working with internal teams to run (or run your own) signal integrity simulations on both power and datapath signals
- Working closely with mechanical and thermal engineers...
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