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Director Post-Si Electrical Validation Engineering

Astera Labs · San Jose, California, United States · On-site

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About Astera Labs

Astera Labs: Purpose-Built Connectivity for Rack-Scale AI.

About the role

Astera Labs is seeking a Director of Post-Si Electrical Validation Engineering to lead the development, bring-up, and validation of ASIC SerDes and PCIe PHY products that enable rack-scale AI infrastructure. Working closely with ASIC, systems, firmware, signal integrity, power integrity, mechanical, thermal, manufacturing, and customer engineering teams, you will guide products from concept and architecture through qualification and mass production. Found on 1752vc Careers, the job board for startup and VC roles.

What they're looking for

  • Board Product Strategy and Technical Leadership
  • High-Speed SerDes Validation
  • Cross-Functional and Customer Execution
  • Team Development and Productization
  • Bachelor’s degree in Electrical Engineering or a related technical field. Master’s degree in Electrical Engineering preferred
  • 12 - 15+ years of relevant experience, consistent with Astera Labs’ standardized Director level
More about this role

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com .

Astera Labs is seeking a Director of Post-Si Electrical Validation Engineering to lead the development, bring-up, and validation of ASIC SerDes and PCIe PHY products that enable rack-scale AI infrastructure. Working closely with ASIC, systems, firmware, signal integrity, power integrity, mechanical, thermal, manufacturing, and customer engineering teams, you will guide products from concept and architecture through...

Read the full posting on Astera Labs's site ↗

Hardware Engineering

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