Startups

Principal Physical Design Engineer -EMIR & Power Integrity

Astera Labs · San Jose, California, United States · On-site

← All jobs
About Astera Labs

Astera Labs: Purpose-Built Connectivity for Rack-Scale AI.

About the role

Astera Labs is scaling the connectivity fabric behind the world's largest AI clusters, and reliable power delivery is non-negotiable in the SoCs we ship. As a Principal Physical Design Engineer , you will own IR drop and electromigration (EMIR) analysis and closure across Astera Labs' connectivity ASIC portfolio, driving power integrity from early floorplan through tapeout.

What they're looking for

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field
  • 8+ years of experience in IR drop, electromigration analysis, and power integrity sign-off for complex SoCs at advanced nodes (7nm and below)
  • Deep expertise in power grid design, PDN analysis, and EM reliability mitigation, including static and dynamic IR methodologies and foundry sign-off criteria
  • Proficiency with Cadence Voltus and/or Synopsys RedHawk-SC / PrimeTime PX
  • Strong scripting ability in Tcl, Python, and/or Perl for flow automation and data analysis
More about this role

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com .

Role Overview

Astera Labs is scaling the connectivity fabric behind the world's largest AI clusters, and reliable power delivery is non-negotiable in the SoCs we ship. As a Principal Physical Design Engineer , you will own IR drop and electromigration (EMIR) analysis and closure across Astera Labs' connectivity ASIC portfolio, driving power integrity from early floorplan through tapeout.

You will partner closely...

Read the full posting on Astera Labs's site ↗

ASIC Engineering

Build your edge while you search

Free tools for founders and investors, plus VC Unfiltered, our take on startups, venture and the people who build them.