全球领先的中文搜索引擎、致力于让网民更便捷地获取信息，找到所求。百度超过千亿的中文网页数据库，可以瞬间找到相关的搜索结果。.
About the role
• Architect, design and implement new features, performance improvements, and ISA extensions in RISC-V CPU core generators. • Microarchitecture development and specification. Ensure that knowledge is shared via great documentation and participation in a culture of collaborative design.
What they're looking for
- • 8+ yrs of recent industry experience in high-performance, energy-efficient CPU designs
- • Expertise in CPU processor designs in one or more of the following areas: instruction fetch and decode, branch prediction, register renaming and instruction scheduling, scalar and/or vector execution units, load-store unit, cache and memory subsystems
- • Knowledge of RISC-V architecture is a plus
- • Proficiency with hardware (RTL) design in Verilog, System Verilog, or VHDL
- • Experience with Scala and/or Chisel is a plus
- • Attention to detail and a focus on high-quality design
More about this role
• Architect, design and implement new features, performance improvements, and ISA extensions in RISC-V CPU core generators.
• Microarchitecture development and specification. Ensure that knowledge is shared via great documentation and participation in a culture of collaborative design.
• Perform initial sandbox verification, and work with design verification team to create and execute thorough verification test plans.
• Work with physical implementation team to implement and optimize physical design to meet frequency, area, power goals.
• Collaborate with performance modelling team for performance exploration and optimization to meet performance goals.
• 8+ yrs of recent industry experience in high-performance, energy-efficient CPU designs.
• Expertise in CPU processor designs in one or more of the following areas: instruction fetch and decode; branch prediction; register renaming and instruction scheduling; scalar and/or vector execution units; load-store unit; cache and memory subsystems.
• Knowledge of RISC-V architecture is a plus.
• Proficiency with hardware (RTL) design in Verilog, System Verilog, or VHDL.
• Experience with Scala and/or Chisel is a plus.
• Attention to...
Browse similar: Startup jobs