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R&D Engineer, IC Design

Broadcom · USA-CA Irvine Alton Parkway Bldg 2 · On-site

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About Broadcom

Broadcom delivers semiconductors and infrastructure software for global enterprises’ most complex, mission-critical needs.

About the role

1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Found on 1752vc Careers, the job board for startup and VC roles.

What they're looking for

  • Bachelor's degree in Computer Science, Electrical Engineering or a related field
  • Minimum of 2 years of relevant experience
  • Working knowledge of Verilog/SystemVerilog
  • Working knowledge of the Linux operating system
  • Familiarity with Cadence Virtuoso
  • Proficiency with Python, Git, JIRA, Windows and the Google Office suites
More about this role

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2. If you already have a Candidate Account, please Sign-In before you apply.

  • Write and maintain assertions and DV tests for chip-level and block-level models
  • Gather design data from circuit designers
  • Create netlists and use AI to create models, including real-number models
  • Write tests to verify the models
  • Write code to automate tasks
  • Bachelor's degree in Computer Science, Electrical Engineering or a related field
  • Minimum of 2 years of relevant experience
  • Working knowledge of Verilog/SystemVerilog
  • Working knowledge of the Linux operating system
  • Familiarity with Cadence Virtuoso
  • Proficiency with Python, Git, JIRA, Windows and the Google Office suites
  • Experience with real-number modeling
  • Experience with AI-assisted development tools
  • Strong track record of collaborating with different teams

Verilog/SystemVerilog, real-number modeling, Python, Cadence Virtuoso, cross-team communication and coordination

The annual base salary range for this position is USD 74,000.00 To USD 118,800.00

As a valued member of our team, you'll be...

Read the full posting on Broadcom's site ↗

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