Broadcom delivers semiconductors and infrastructure software for global enterprises’ most complex, mission-critical needs.
About the role
Full-Flow Implementation: Lead block-level and top-level implementation from floorplanning to GDSII stream-out using Cadence Innovus Advanced Node Execution: Drive floorplanning, placement, CTS, routing, and timing/power optimization on advanced technology nodes (5nm, 3nm, 2nm) using multi-patterning and complex metal stacks. Found on 1752vc Careers, the job board for startup and VC roles.
What they're looking for
- Education: B.S. or M.S. degree in Electrical Engineering, Computer Engineering, or a related technical field
- Experience: 8+ years of hands-on physical design experience successfully taping out complex high-frequency, ultra-large-scale networking or AI ASICs
- Deep Sub-Micron Expertise: Direct experience executing tapeouts in TSMC advanced nodes (N7, N5, N3) or equivalent foundry processes
- P&R: Cadence Innovus
- Timing/STA: Synopsys PrimeTime or Cadence Tempus
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Broadcom’s ASIC Products Division (APD) is the global leader in custom high-performance silicon solutions. We partner with the world’s most innovative technology companies—spanning hyper-scale cloud providers, AI pioneers, and tier-1 networking infrastructure leaders—to co-design and manufacture complex, custom ASICs that power the modern digital backbone.
The Physical Design team within APD is the world-class execution engine behind the industry's most advanced custom silicon. We push the limits of silicon technology by combining deep architectural expertise, advanced IP, cutting edge physical design methodologies in 3nm/2nm nodes, and advanced 2.5D/3D chiplet integration to solve the most demanding compute and bandwidth challenges.We transform ultra-complex architectures into fully realized, high-yielding, first-pass silicon success.
Broadcom is searching for an Senior Physical Design Engineer to join the ASIC Products Division. This position involves working with the...
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