Broadcom delivers semiconductors and infrastructure software for global enterprises’ most complex, mission-critical needs.
About the role
Verification environment development using modern verification techniques (System Verilog and UVM) Designing verification classes such as UVM sequences, agents, scoreboards, and behavioral models Found on 1752vc Careers, the job board for startup and VC roles.
What they're looking for
- Excellent communication and interpersonal skills
- Experience communicating in a matrix organization to achieve common goals
- Demonstrated expertise in HDL languages Verilog/VHDL and SystemVerilog
- Experience in designing in constrained random environments using UVM, OVM, or VMM
- Experience running and debugging using HDL simulators
- Demonstrated familiarity with OOP languages (C++, Java, etc.) and Proficient with OOP techniques
More about this role
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The ASIC Product Division in Broadcom, a leading supplier of state-of-the-art SoC and embedded IP, is looking for qualified individuals to work in SoC and IP development programs. The candidate will be joining a high-performance design team responsible for state-of-the-art subsystem development to meet customer requirements for AI and storage chips.
Verification environment development using modern verification techniques (System Verilog and UVM)
Designing verification classes such as UVM sequences, agents, scoreboards, and behavioral models
Implementing coverage and assertions using System Verilog
Developing random & directed test cases to close coverage
Analyzing and debugging simulation failures, as well as analyzing coverage results.
Candidate must be a highly productive individual contributor with demonstrated technical capability in system and sub-block level verification.
Excellent communication and interpersonal skills
Experience communicating in a matrix...
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