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CMOS SerDes or High-Speed I/O, Lead Analog IC Design Engineer

Cadence · SAN JOSE · On-site

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About Cadence

Cadence delivers remote patient monitoring and chronic disease management that improves outcomes and reduces cost at scale. Intelligent senior care that works better by working ahead. Backed by General Catalyst.

About the role

The Lead Analog IC Design Engineer is responsible for designing and developing analog and mixed-signal circuits- from initial concept and specification through final verification- to ensure conformance with customer requirements. Found on 1752vc Careers, the job board for startup and VC roles.

What they're looking for

  • At least three years of experience designing and developing CMOS SerDes or high-speed I/O integrated circuits
  • Design experience with most of the following SerDes circuit blocks: Transmitters and receivers, serializers and deserializers, phase interpolators, low-jitter PLLs, high-speed clock-distribution circuits, bias circuits, and voltage regulators
  • Good understanding of jitter and signal-equalization techniques
  • Proficiency with CAD tools for circuit simulation, layout, and physical verification
  • Master’s degree or Ph.D. in electrical engineering
  • Strong problem-solving skills and analog design aptitude
More about this role

The Lead Analog IC Design Engineer is responsible for designing and developing analog and mixed-signal circuits- from initial concept and specification through final verification- to ensure conformance with customer requirements.

• At least three years of experience designing and developing CMOS SerDes or high-speed I/O integrated circuits.

• Design experience with most of the following SerDes circuit blocks: Transmitters and receivers, serializers and deserializers, phase interpolators, low-jitter PLLs, high-speed clock-distribution circuits, bias circuits, and voltage regulators.

• Good understanding of jitter and signal-equalization techniques.

• Proficiency with CAD tools for circuit simulation, layout, and physical verification.

• Master’s degree or Ph.D. in electrical engineering.

• Strong problem-solving skills and analog design aptitude.

• Clear written and verbal communication skills.

• Ability to collaborate effectively in a team environment.

• Working knowledge of common SerDes standards and their electrical requirements.

• Experience with Cadence design tools and laboratory testing.

• Design experience at data rates above 10 Gbps and in process technologies below 28...

Read the full posting on Cadence's site ↗

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