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Solutions Engineer - AE

Cadence · No Seat Req United States · On-site

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About Cadence

Cadence delivers remote patient monitoring and chronic disease management that improves outcomes and reduces cost at scale. Intelligent senior care that works better by working ahead. Backed by General Catalyst.

About the role

Cadence is seeking a highly motivated and experienced Solutions Application Engineer to support customers developing next-generation advanced packaging solutions, including 2.5D, 3D-IC, chiplet-based architectures, AI/HPC packages, and heterogeneous integration technologies. Found on 1752vc Careers, the job board for startup and VC roles.

What they're looking for

  • Bachelor’s degree (Masters preferred) in Electrical or Electronics Engineering, or related discipline with
  • 10+ years of experience in semiconductor packaging, IC packaging, PCB, substrate, or interposer design
  • Strong knowledge of: Advanced package design methodologies
  • 2.5D and 3D-IC integration
  • Chiplet-based architectures
  • Package manufacturing and assembly processes
More about this role

United States (Remote or Hybrid)

Cadence is seeking a highly motivated and experienced Solutions Application Engineer to support customers developing next-generation advanced packaging solutions, including 2.5D, 3D-IC, chiplet-based architectures, AI/HPC packages, and heterogeneous integration technologies.

The successful candidate will work directly with leading semiconductor companies, OSATs, foundries, and system companies to deploy and optimize Cadence Advanced Package 3D-IC associated design flows. This role combines technical expertise, customer engagement, solution development, and collaboration with R&D to drive customer success and product adoption.

  • Provide technical leadership and application support for Cadence 3D-IC design solutions.
  • Assist customers with advanced package architecture, design implementation, and methodology development.
  • Develop and demonstrate complete packaging workflows for: Organic substrates
  • Silicon interposers
  • Wafer Level Packaging
  • 2.5D and 3D-IC integration
  • Chiplet-based package architectures
  • Support customer evaluations, proof-of-concepts, benchmarks, and production deployments.
  • Deliver technical presentations, product...

Read the full posting on Cadence's site ↗

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