AI-driven chip design and verification with ChipAgents. Iterate on Your Chip Design & Verification 10x Faster by Collaborating with ChipAgents in Your Favorite Code Editor. Backed by Bessemer.
About the role
We’re hiring an STA/Timing ClosureLead to develop solutions for closing timing on multi-billion instance ICs and 3D ICsYou’ll work with R&D to define the product architecture and refine the solution at our customer sites. Design our approach to timing closure for very large designs and 3D ICs with the R&D team. Found on 1752vc Careers, the job board for startup and VC roles.
What they're looking for
- BS or MS in Electrical Engineering, Computer Engineering, or a related field
- 10+ years running STA and timing closure at a tier 1 design houses
- Experience closing timing at advanced process nodes
- Strong hands on experience with commercial synthesis and timing tools such as Design Compiler and Fusion Compiler
- Deep knowledge of STA, Liberty formats, and device characterization
- Background in device physics at advanced nodes
More about this role
ChipAgents is revolutionizing chip design and verification with agentic-AI workflows. Founded by experts in AI and semiconductor design, we partner with top-10 semiconductor companies, hyperscale cloud providers, and cutting-edge startups. Our platform accelerates RTL development, functional verification, and simulation, unlocking new levels of productivity and design quality.
We’re hiring an STA/Timing ClosureLead to develop solutions for closing timing on multi-billion instance ICs and 3D ICsYou’ll work with R&D to define the product architecture and refine the solution at our customer sites.
Design our approach to timing closure for very large designs and 3D ICs with the R&D team.
Run backend and timing flows with customers and use what you learn to improve the product.
Share customer feedback with research and product teams to help set priorities.
Act as our in house expert on STA and timing closure.
BS or MS in Electrical Engineering, Computer Engineering, or a related field.
10+ years running STA and timing closure at a tier 1 design houses.
Experience closing timing at advanced process nodes.
Strong hands on experience with commercial synthesis and timing tools such as...
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